UC Riverside

The past decade has witnessed rapid proliferation of wireless communications, which continues to enjoy a booming growth driven by unprecedented technology advances and strong consumer demands. New wireless technologies are being developed to provide people with high-speed low-cost multi-mode multi-task wireless communication environments with high quality of service (QoS). Of all the proposed wireless techniques, ultra wideband (UWB) is a promising technology, which becomes a front contender for various extremely high data throughput wireless applications, particularly for wireless video streaming and wireless sea-volume data transformation typically requiring a data speed up to several giga bit per second (Gbps).

This dissertation describes research and integrated circuit (IC) implementation of a single-full-band carrier-free impulse-radio ultra wideband (IR-UWB) system. The IR-UWB transceiver adopts a simple-most-digital architecture with low design complexity, aiming to achieve the whole IR-UWB system-on-a-chip (SoC) in standard complementary metal-oxide-semiconductor (CMOS) process. Detail analysis for the IR-UWB system architecture is provided. Critical circuit building blocks, such as pulse generator (PG), BPSK modulation, receiver front-end low-noise amplifier (LNA) and correlator, are described both theoretically and experimentally.

Adequate on-chip electrostatic discharge (ESD) protection is required for all IC chips and ESD protection design for radio-frequency (RF) IC emerges as a challenging design task as semiconductor IC technologies continue to advance into the very-deep-sub-micron (VDSM) regime. ESD protection for IR-UWB ICs is more challenging compared with narrow band IC designs. In this thesis, a novel ESD-RFIC co-design technique for UWB ICs was developed and experimentally verified. The interactions between ESD protection unit and core UWB IC were thoroughly investigated. The IR-UWB transmitter, front-end LNA and correlator ICs were designed with full ESD protection using the new ESD-RFIC co-design technique in this work.