Skip to main content
eScholarship
Open Access Publications from the University of California

UCLA

UCLA Electronic Theses and Dissertations bannerUCLA

Wideband Reconfigurable Blocker Tolerant Receiver for Cognitive Radio Applications

Abstract

Cognitive radios (CRs) use “white spaces” in spectrum for communication. This requires front-end circuits that are highly linear when the white space is adjacent to a strong blocker. For example, in the TV spectrum (54 MHz-862 MHz) broadcast transmissions are the blockers.

This work describes the design of a wideband blocker tolerant receiver. First EKV based MOSFET model is used to analyze RF transconductor distortion. Expressions for its IIP3 and P1dB are also given. Derivative superposition based linearization scheme for the RF transconductor is also explained.

Second mixer switch nonlinearity is analyzed using EKV. Simple expressions for receiver IIP3 and P1dB are given that provide design insights for linearity optimization. Low phase noise LO design is also described to lower receiver noise figure in the presence of large blockers.

Finally, transimpedance amplifier (TIA) large-signal operation is studied using EKV. It is shown that source follower inverter-based TIA transconductor results in higher receiver P1dB.

A prototype receiver based on these ideas was designed in 16nm FinFET CMOS. Measured results show that receiver can operate from 100 MHz to 6 GHz and it can tolerate up to +12 dBm blockers. Furthermore, its noise figure is only 8.9 dB in the presence of +10 dBm blocker located at 80 MHz offset.

Main Content
For improved accessibility of PDF content, download the file to your device.
Current View