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Toward Future Brain-Computer Interface: Concurrent Neural Signal Acquisition and Brain Stimulation in CMOS

Abstract

Most people living with spinal cord injury (SCI) suffer from paralysis and loss of sensation below the level of injury. Brain-computer interfaces (BCIs) are a promising approach to addressing SCI and other neurological disabilities by providing an alternative communication pathway between the brain and an external device to bypass the malfunctioned neuromuscular pathway. Among several existing signal platforms for BCI applications, subdurally recorded electrocorticogram (ECoG) gains increasing attention due to its decent spatio-temporal resolution, signal-to-noise ratio (SNR), and being moderately invasive. Such ECoG-based BCI operation requires acquiring and decoding movement intentions to restore motor functions while simultaneously eliciting artificial sensations to restore sensory functions. This concurrent neural data acquisition and brain stimulation poses a significant challenge due to the presence of extremely strong stimulation artifacts which can be orders of magnitude larger than the underlying neural signals. In addition, ECoG-based bi-directional BCIs (BD-BCIs) require fully implantable neural recording and stimulation systems to restore motor and sensory functions, respectively. To reduce the size and power consumption of these fully implantable systems, custom-designed integrated circuits including as much functionality as possible with the minimum usage of external components are needed.

This thesis presents one work of optimization algorithm to solve the problem of stimulation artifacts in ECoG-based BD-BCIs, one silicon-tested prototype including both the recording and stimulation systems for BD-BCI applications, and one stimulation system targeting improved charge balancing performance. In the first work, since artifact cancellation can be achieved by adding an auxiliary stimulation of the opposite polarity between the primary stimulation and the recording sites, a simple constrained optimization algorithm for finding the parameters of the auxiliary stimulation that yields optimal artifact suppression is designed. The BD-BCI prototype presents a high-voltage (HV) multipolar neural stimulation system with time-based charge balancing and a mixed-signal neural data acquisition system using successive approximation register analog-to-digital converters. To improve the performance of charge balancing, the second stimulation system is designed as a multipolar HV compliance system incorporating dual-mode time-based charge balancing. Electrical, in-vitro and in-vivo experimental measurements have verified the functionality and performance of the systems above.

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