UC San Diego

The trend toward increasing device density and decreasing price in the semiconductor electronics predicted by Moore’s law has remained consistent for the past four decades. Recently, entirely new classes of applications have emerged and innovations beyond Moore’s law scaling have shifted gradually toward the seamless integration of digital computing within our daily lives, commonly termed as More than Moore. To this end, emerging digital technologies in the next generation of digital electronics take the form of flexible, wearable, and printable electronics as well as

smaller and versatile sensing electronics. Electronic devices integrated into a novel system or unconventional form factors attract a lot of attention due to their unique degrees of freedom in flexibility as well as rich features and integrated novel functionalities. They rapidly find a broad range of applications in consumer health and electronic products for display, sensing, lighting, and energy conversion.

This work aims, on the one hand, toward functional materials synthesis and device applications that are believed to find sensing applications in wearable or flexible electronics. Low cost, energy-efficient solution-based chemical synthesis technique is studied for metal-oxide semiconductor thin films. A transparent, highly sensitive nickel oxide (NiO)/zinc oxide (ZnO) heterojunction ultra-violet (UV) photodetector is demonstrated. In addition, thin films of NiO and ZnO are studied as alternative materials to genuinely rare and valuable metal catalysts for a large-scale and economically viable water splitting system. On the other hand, this study places an emphasis on the monolithic system integration of solar-powered MOSFET circuits for wearable electronics. In order to create wearable electronics featuring flexibility or bendability as well as high performance, they need to be fabricated on a crystalline silicon substrate which is thin enough to flex. To this end, wafer thinning techniques and post-process device layer transfer methods are developed on a silicon-on-insulator (SOI) wafer. The unique approach involves the post-processing wafer removal from wafer backsides followed by a device embedding process in a polymer substrate.