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Model-Based Software Synthesis for Cyber-Physical Systems

Abstract

Software design and implementation has become critical and increasingly challenging for cyber-physical systems (CPS) in domains including automotive, avionics, robotics, industrial automation, etc. The challenges in CPS software rise from rapid increase of system scale and complexity, close interaction between cyber components and dynamic physical environment, more sharing and contention among software functions over multicore and distributed platforms, and stringent requirements on system timing and design metrics such as performance, fault tolerance, reliability and extensibility.

During the implementation of CPS software, there are two main aspects: 1) Task generation for generating tasks from functional model. 2) Task mapping for allocating and scheduling tasks on hardware platforms. While there are a large body of works on optimizing task mapping with respect to various design metrics such as performance, extensibility and memory, task generation is carried out without much optimization of these design metrics and is detached from task mapping. Most importantly, current task generation approaches lack sufficient consideration of timing, which not only affects the optimization of design metrics but also the functional correctness of the system. These issues often result in long software design cycles, high verification cost, and ultimately inferior and error-prone system implementations.

In this dissertation, we propose to build a model-based software synthesis framework for cyber-physical systems that automates and optimizes the generation of software tasks from functional models and the mapping of those tasks onto real-time embedded platforms in an integrated fashion, with respect to various design metrics including performance, extensibility, reusability, modularity and memory. We treat timing as a first-class citizen in this process for effectively optimizing timing-related metrics (e.g. performance, extensibility) and ensuring functional correctness. We consider a variety of practical hardware platforms, including single-core, multicore, and time-triggered or asynchronous distributed platforms. The applicability of this framework is validated by simulations on real-world CPS applications and synthetic cases.

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