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Extending Temporal-Vector Microarchitectures for Two-Dimensional Computations

Abstract

Modern computing is shaped by technology trends, like a slowing Moore’s law and lack of Dennard scaling, as well as application trends, like mass application of machine learning. Technology has constrained modern computer architectures to focus on energy-efficiency in order to improve, battery life, total cost of ownership, and even performance. Emerging deep-learning applications require computation volumes that increase exponentially and yet change in structure substantially every few years. One solution for both of these problems is specialized programmable architectures, that can adapt to new applications while specializing for the commonalities, and thus improving energy-efficiency.

This thesis presents a set of two-dimensional architecture extensions for Hwacha an exist- ing vector-fetch architecture designed to improve energy-efficiency on two-dimensional computation while remaining fully programmable. This thesis discusses the constraints modern CMOS process technologies place on such an architecture, and describes several silicon implementations of similar architectures. Finally, this thesis presents the physical implementation of such extensions and their realized energy-efficiency gains on select applications.

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